1. Field of the Invention
The disclosures herein generally relate to a memory device, and particularly relate to a nonvolatile memory device which is capable of retaining stored data in the absence of a power supply voltage.
2. Description of the Related Art
Nonvolatile semiconductor memory devices, which can retain stored data even when power is turned off, conventionally include flash EEPROM employing a floating gate structure, FeRAM employing a ferroelectric film, MRAMs employing a ferromagnetic film, etc. There is a new type of nonvolatile semiconductor memory device called PermSRAM. PermSRAM uses a pair of MIS (metal-insulating film-semiconductor) transistors as a nonvolatile memory cell (i.e., the basic unit of data storage). The two paired MIS transistors used as a nonvolatile memory cell in PermSRAM have the same structure as ordinary MIS transistors used for conventional transistor functions (e.g., switching function), and do not require a special structure such as a floating gate or a special material such as a ferroelectric material or ferromagnetic material. The absence of such a special structure and special material offers an advantage in cost reduction. PermSRAM was initially disclosed in PCT/JP2003/016143, which was filed on Dec. 17, 2003, the entire contents of which are hereby incorporated by reference.
One of the two paired MIS transistors used as a nonvolatile memory cell in PermSRAM is configured to experience an irreversible hot-carrier effect on purpose for storage of one-bit data. Here, the irreversible hot-carrier effect refers to the injection of electrons into the gate oxide film (i.e., gate insulating film). A difference in the transistor characteristics caused by the hot-carrier effect represents one-bit data “0” or “1”. Such a difference may be detected as a difference in the ON current between the two paired MIS transistors by using a sense circuit such as a one-bit static memory circuit (i.e., latch) coupled to the MIS transistor pair.
A hot-carrier effect is asymmetric with respect to the source and drain relation of a transistor. When the source node and drain node used to apply a bias for generating a hot-carrier effect are used as a source node and a drain node, respectively, at the time of detecting a drain current, the detected drain current exhibits a relatively small drop caused by the hot-carrier effect. When the source node and drain node used to apply a bias for generating a hot-carrier effect are swapped and used as a drain node and a source node, respectively, at the time of detecting a drain current, the detected drain current exhibits a significant drop caused by the hot-carrier effect. The difference in the detected drain current between these two scenarios is approximately a factor of 10.
Such asymmetric characteristics of a hot-carrier effect are attributable to the fact that most of the electrons injected by the hot-carrier effect into the gate oxide film are situated closer to the drain node than to the source node. At the time of detecting a drain current, the presence of trapped electrons near the drain node does not produce a significant drop in the amount of drain current, compared with the case in which no electron is trapped. The presence of trapped electrons near the source node, on the other hand, produces a significant drop in the amount of drain current, compared with the case in which no electron is trapped. Detecting the drain current is thus equivalent to detecting whether trapped electrons are in existence near the source node. Since swapping the directions of drain current results in swapping in the positions of the source node, the above-noted asymmetric characteristics may be utilized to increase memory storage density.
Accordingly, the asymmetric characteristics of a hot-carrier effect may be utilized to increase memory storage density.